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How does a work function difference cause band bending in equilibrium in Metal-Oxide-Semiconductor (MOS)?

Physics Asked on July 31, 2021

How does a work function difference cause band bending in equilibrium in Metal-Oxide-Semiconductor (MOS)? I don’t understand the physical meaning behind this sentence from Sze:

to accommodate the work function difference, the semiconductor bands bend

I understand that the work functions are the the energies required to move an electron from the fermilevel to the vacuum. I do not understand why this implies band bending when a metal and a semiconductor of different work functions are brought together.

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One Answer

The work function is the energy necessary to move an electron from the Fermi level to the vacuum level. When you bring two materials in contact, here the metal and the semiconductor, thermodynamic equilibrium will require that the two Fermi levels (electrochemical potentials) equalize. This can be thought of to happen by the transition of electrons from the material with lower work function to the material with higher work function which increases the electrostatic potential of the low work function material with respect to high work function material until the Fermi levels are equal. Now, far from the interface the vacuum levels differ by justnthe work function difference and the vacuum potential level has to make a continuous transition when going from one material to the other. For energy conservation (movement of an electron along a circular path including the vacuum level and the internal metal/semiconductor interface), the same potential difference has to build up at the internal junction of the materials. The potential difference is also called contact potential. This potential difference is produced by space charge regions (e.g., electron depletion and accumulation zones at the interface) which lead to the mentioned band bending at the metal-semiconductor interface. In the MOS system the potential difference corresponding to the work function differences drops over the depletion/inversion space charge region at the surface of the semiconductor and the linear potential drop over the gate insulator $SiO_2$.

Answered by freecharly on July 31, 2021

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