Negative Voltage In Capacitor When + Side Is Connected To -

I am reading this very interesting question and the answers below it... and two things amaze me:

First, how no one (I do not mean OP) evaluated these comprehensive answers with at least one elementary +1 (especially, the Tony's answer accompanied by a simulation). SE EE only loses from such an attitude towards else's achievements because, in this way, it will gradually turn from a cohesive society into a mechanical mixture of unrelated individuals.

Second, how did no one (excluding, to some extent, the DKNguyen's answer) give a simple and clear intuitive explanation of this circuit trick based only on basic electrical concepts?

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The question is about the well-known circuit concept of "voltage shifting"... or, more precisely, "dynamic voltage shifting". We can see it, for example, in the bias circuits of AC amplifiers (decoupling capacitors), RC differentiating circuits, capacitive voltage multipliers, etc.

The best way to understand and explain it is to think of the capacitor (with a high enough capacitance) as a "rechargeable battery". In the OP's circuit, it is initially charged by the voltage source through the two (1k and 10 k) resistors in series to the magnitude of Vcc. But why do we need two resistors instead of only one?

The role of resistors is to decouple the capacitor from both source terminals. Thus, the fully charged capacitor behaves as a floating "battery" that can be easily "moved" in any direction by fixing one of its terminals to some of the source terminals. The resistors will not affect the voltages but only the common current. Here are the possible connections:

If we connect the positive capacitor terminal to the positive source terminal (turning on a switch connected between them), or the negative capacitor terminal to the negative source terminal, nothing (neither current or voltage) will change. The reason of that is because two equal voltage sources are connected in series and they neutralize each other. Their voltages are subtracted and the resulting voltage in the loop is zero. No current flows through the resistors... and if we short one of them, nothing will change.

Then, if we connect, according to the OP's question, the positive capacitor terminal to the negative source terminal (turning on the switch in the OP's figure), the negative capacitor terminal will be "shifted down" with Vcc.

Finally, if we connect the negative capacitor terminal to the positive source terminal, the positive capacitor terminal will be "shifted up" with Vcc… and its voltage (in respect to ground) will be 2Vcc. This means that the two voltage sources are connected in series in the same direction. Capacitive voltage multipliers exploit this idea.

So, the unique property of this circuit trick is that it can produce voltage outside the range limited by the supply rails - below the negative rail and above the positive rail. It does it by connecting the charged capacitor in series to the voltage source.

Of course, the capacitor gradually discharges and needs to be recharged from time to time (like the refresh in SRAM). That is why, I have called above this trick "dynamic". So, it can be applied in AC circuits.

Yes this approximately what occurs in the Astable "flipflop" oscillator.

1. Assume your lower left switch is conducting like a forward-biased diode or Vbe=0.6V and the cap on the right is pulled up towards Vcc with the top right switch = off with Vce=Vcc = off & Vbe=off << 0.6V.

2. When the left side switch closes with Vcc across its series cap and there is no load on the cap's other side because the cap voltage did not instantly change and if the + side drops by almost 5V then the -ve side must also do the same as the dV/dt=Ic/C there is current during the transition so the voltage across the cap does not change instantly.

3. Only the switch voltage changes instantly across Vce as the Vbe also changes abruptly off and slowly towards on.

Here is the transistor simulation of your circuit. with full scope traces and peak voltages.

Advanced details:

Note that if the Vcc was 9V that the Vbe reverse voltage often exceeds the rated reverse voltage of -5V for Vbe. (little appreciated fact.) So the negative sawtooth Vbe signal may be clamped with reverse diode. This shortens the ramp from -0.6 to +0.6V and thus raises the frequency.

I also changed one Rb higher to show the change in duty cycle from different RC time constants. You can change them as you like. Although the beta's in each transistor are shown different (100, 20) Falstad only uses a fixed value, where as in reality, it depends on Vce as the switch saturates, Beta or hFE drops down towards 10% of its maximum. This is how Vce(sat) is usually defined. Ic/Ib=10

Run your simulation at maximum speed with 75% current speed. Observe the capacitor voltage. Your capacitor is so large and your 10K resistor is so large that after the capacitor charges up, it takes a long time for the capacitor to discharge and while it's discharging the current that if you run at slow speed you are perpetually stuck in a transient state that looks like steady state.

Observe the current direction through the 10K resistor before and after switching and note what voltage drop polarity that represents relative and what it does for the voltage on the negative terminal of the capacitor with respect to ground.

You should see that when if you open the open the rightmost switch and allow the capacitor to charge, then close the switch so the capacitor discharges, the discharge current flows through the 10K resistor in a direction where (using passive sign convention) the resistor terminal for the + end voltage drop is the ground/0V node and the terminal for the negative end of the voltage drop is the capacitor's negative terminal. If you measure with the supply's negative terminal as your reference, then the other end of the resistor (the capacitor's negative terminal) will measure as below ground.