How to design and implement a sequence detector

Question

I have to implement a Moore machine that has an input L and an output Z.
The input line L provides values of 1 and 0 as input, in a random order.
The output line Z takes the value 1 whenever two values of 0 and two values of 1 have been detected in the input, no matter the order.
For example the sequences 0011, 00001001 and 1010 would all set line Z to 1.
I have to use D flip-flops and NAND gates only but am stuck halfway.
So far I have drawn the state diagram and the table below: (CS stands for current state and FS stands for future state).
I know that I must draw 8 Karnaugh maps I think but I am not sure and I have to use 3 or 4 flip flops.  
Could you point me in the right direction?
EDIT
After some more research I managed to finally draw the Karnaugh maps and extract the functions, and I designed a circuit using LogiSim. I am not sure what I have done wrong and have no idea how to proceed. The circuit is not doing what it's supposed to do. Here is a link to my LogiSim circuit.

Brian Drummond · Answer

Being kind of old myself, I expect you to study like #### too. :D

One question may help clarify the circuit you need : how does it distinguish between 2 successive states that are the same? Or alternatively : Is there a separate clock signal, not mentioned above? If so, the basic pattern of the circuit may become clear.

Ask yourself :
how many states do you have?
how many bits are required to implement all these states?

You have already given each state a unique number : it will help to write those numbers out in binary as part of each state table.

Then treat each bit of that number separately : first create a Karnaugh map for the next state for bit 0. What are the input variables for that KMap?

How to design and implement a sequence detector

One Answer

Add your own answers!

Ask a Question