History question - why are logic levels inverted between TTL and RS232?

This is partly speculation, but here goes:

Originally, asynchronous serial interfaces were current loops. In order to make things like detecting wiring faults easier, the "idle" state was defined as current flowing, and the "start" bit was a brief interruption of the current.

The first devices were strictly electromechanical, but as soon as digital electronics became common enough, there was a desire to use the teletypes for I/O. It would make sense, then, that the logic that drives the current loop would be "on", or high for the same condition, because that would be the obvious way to drive, say, an NPN transistor.

Now, switch to voltage signaling. The telephone line sits at a negative voltage with respect to ground, because it was discovered early on that this reduced electrolytic corrosion in the wires caused by moisture.

So, for the same reason, the "idle" state in RS-232 was defined to be the negative voltage, because that is the state that the line is in most of the time.

Therefore, the translation between logic and RS-232 needed to be inverting.

It could come from the preceeding current loop interfaces, where the current does not flow in the active logic 0 state and flows in the idle logic 1 state.

If there is a wire disconnection or unpowered transmitter, the current flow stops so this is seen as too long logic 0 state by the receiver. Most UARTs can detect this and signal this break condition to software layers.

Note that while MIDI is also a current loop interface, it works the opposite way, current flows in the active logic 0 state. I wasn't thinking beyond MIDi in my original answer, so it didn't reflect the original current loop interfaces.