Fine delay tuning using phase interpolation

Electrical Engineering Asked by sahithi on December 2, 2020

In the schematic of fine delay, each unit should produce 3ps delay, so the fine delay block is constructed using parallel combination of 8 inverters… Like that parallel combination of inverters we have 2 structures. To one structure we applied the signal which is to be fine delayed. To another structure we applied the signal which is delayed by 24ps.

So here in this structure how is fine delaying happening and how is phase interpolation happening?

Image shows the architecture

Add your own answers!

Ask a Question

Get help from others!

© 2024 All rights reserved. Sites we Love: PCI Database, UKBizDB, Menu Kuliner, Sharing RPP